* gnu/packages/fpga.scm (trellis): New variable.
Change-Id: I90a7c7c0994508a16193c5ae2b8659c1d32a3c33
---
gnu/packages/fpga.scm | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
Toggle diff (43 lines)
diff --git a/gnu/packages/fpga.scm b/gnu/packages/fpga.scm
index 99841fb6..b42a3503 100644
--- a/gnu/packages/fpga.scm
+++ b/gnu/packages/fpga.scm
@@ -619,3 +619,36 @@ (define-public openfpgaloader
to an FPGA.")
(home-page "https://f4pga.org/")
(license license:asl2.0)))
+
+(define-public trellis
+ (package
+ (name "trellis")
+ (version "1.4")
+ (source
+ (origin
+ (method git-fetch)
+ (uri (git-reference
+ (url "https://github.com/YosysHQ/prjtrellis")
+ (commit version)
+ (recursive? #t))) ;for the database submodule
+ (file-name (git-file-name name version))
+ (sha256
+ (base32 "0c3asdfrjmnc6q3vawn3nfghgg43iajwy2zb8kck9d3wrypbhlmc"))))
+ (inputs (list boost python))
+ (build-system cmake-build-system)
+ (arguments
+ (list
+ #:out-of-source? #f ;README: "unsupported when coupled with nextpnr"
+ #:tests? #f ;contains no test target
+ #:phases #~(modify-phases %standard-phases
+ (add-before 'configure 'chdir-libtrellis
+ (lambda* (#:key #:allow-other-keys)
+ (chdir "libtrellis"))))))
+ (synopsis "Lattice ECP5 bitstream processing")
+ (description
+ "Project Trellis enables a fully open-source flow for ECP5
+FPGAs using Yosys for Verilog synthesis and nextpnr for place and
+route. Project Trellis itself provides the device database and tools
+for bitstream creation.")
+ (license (list license:isc license:expat))
+ (home-page "https://github.com/YosysHQ/prjtrellis")))
--
2.41.0